v 20150401 2 P 100 11200 400 11200 1 0 0 { T 300 11250 5 8 1 1 0 6 1 pinnumber=7 T 300 11150 5 8 0 1 0 8 1 pinseq=1 T 450 11200 9 8 1 1 0 0 1 pinlabel=GPIO16/SPISIMOA/CANTXB T 450 11200 5 8 0 1 0 2 1 pintype=io } P 100 10900 400 10900 1 0 0 { T 300 10950 5 8 1 1 0 6 1 pinnumber=8 T 300 10850 5 8 0 1 0 8 1 pinseq=2 T 450 10900 9 8 1 1 0 0 1 pinlabel=GPIO17/SPISOMIA/CANRXB T 450 10900 5 8 0 1 0 2 1 pintype=io } P 100 10600 400 10600 1 0 0 { T 300 10650 5 8 1 1 0 6 1 pinnumber=9 T 300 10550 5 8 0 1 0 8 1 pinseq=3 T 450 10600 9 8 1 1 0 0 1 pinlabel=GPIO18/SPICLKA/SCITXDB T 450 10600 5 8 0 1 0 2 1 pintype=io } P 100 10300 400 10300 1 0 0 { T 300 10350 5 8 1 1 0 6 1 pinnumber=11 T 300 10250 5 8 0 1 0 8 1 pinseq=4 T 450 10300 9 8 1 1 0 0 1 pinlabel=GPIO19/\_SPISTEA\_/SCIRXDB T 450 10300 5 8 0 1 0 2 1 pintype=io } P 100 10000 400 10000 1 0 0 { T 300 10050 5 8 1 1 0 6 1 pinnumber=12 T 300 9950 5 8 0 1 0 8 1 pinseq=5 T 450 10000 9 8 1 1 0 0 1 pinlabel=GPIO20/EQEP1A/MDXA T 450 10000 5 8 0 1 0 2 1 pintype=io } P 100 9700 400 9700 1 0 0 { T 300 9750 5 8 1 1 0 6 1 pinnumber=13 T 300 9650 5 8 0 1 0 8 1 pinseq=6 T 450 9700 9 8 1 1 0 0 1 pinlabel=GPIO21/EQEP1B/MDRA T 450 9700 5 8 0 1 0 2 1 pintype=io } P 100 9400 400 9400 1 0 0 { T 300 9450 5 8 1 1 0 6 1 pinnumber=14 T 300 9350 5 8 0 1 0 8 1 pinseq=7 T 450 9400 9 8 1 1 0 0 1 pinlabel=GPIO11 T 450 9400 5 8 0 1 0 2 1 pintype=io } P 100 8800 400 8800 1 0 0 { T 300 8850 5 8 1 1 0 6 1 pinnumber=25 T 300 8750 5 8 0 1 0 8 1 pinseq=8 T 450 8800 9 8 1 1 0 0 1 pinlabel=ADCINA0 T 450 8800 5 8 0 1 0 2 1 pintype=in } P 100 8500 400 8500 1 0 0 { T 300 8550 5 8 1 1 0 6 1 pinnumber=24 T 300 8450 5 8 0 1 0 8 1 pinseq=9 T 450 8500 9 8 1 1 0 0 1 pinlabel=ADCINA1 T 450 8500 5 8 0 1 0 2 1 pintype=in } P 100 8200 400 8200 1 0 0 { T 300 8250 5 8 1 1 0 6 1 pinnumber=23 T 300 8150 5 8 0 1 0 8 1 pinseq=10 T 450 8200 9 8 1 1 0 0 1 pinlabel=ADCINA2 T 450 8200 5 8 0 1 0 2 1 pintype=in } P 100 7900 400 7900 1 0 0 { T 300 7950 5 8 1 1 0 6 1 pinnumber=22 T 300 7850 5 8 0 1 0 8 1 pinseq=11 T 450 7900 9 8 1 1 0 0 1 pinlabel=ADCINA3 T 450 7900 5 8 0 1 0 2 1 pintype=in } P 100 7600 400 7600 1 0 0 { T 300 7650 5 8 1 1 0 6 1 pinnumber=21 T 300 7550 5 8 0 1 0 8 1 pinseq=12 T 450 7600 9 8 1 1 0 0 1 pinlabel=ADCINA4 T 450 7600 5 8 0 1 0 2 1 pintype=in } P 100 7300 400 7300 1 0 0 { T 300 7350 5 8 1 1 0 6 1 pinnumber=20 T 300 7250 5 8 0 1 0 8 1 pinseq=13 T 450 7300 9 8 1 1 0 0 1 pinlabel=ADCINA5 T 450 7300 5 8 0 1 0 2 1 pintype=in } P 100 6700 400 6700 1 0 0 { T 300 6750 5 8 1 1 0 6 1 pinnumber=26 T 300 6650 5 8 0 1 0 8 1 pinseq=14 T 450 6700 9 8 1 1 0 0 1 pinlabel=ADCIN14 T 450 6700 5 8 0 1 0 2 1 pintype=in } P 100 6400 400 6400 1 0 0 { T 300 6450 5 8 1 1 0 6 1 pinnumber=27 T 300 6350 5 8 0 1 0 8 1 pinseq=15 T 450 6400 9 8 1 1 0 0 1 pinlabel=ADCIN15 T 450 6400 5 8 0 1 0 2 1 pintype=in } P 100 5800 400 5800 1 0 0 { T 300 5850 5 8 1 1 0 6 1 pinnumber=28 T 300 5750 5 8 0 1 0 8 1 pinseq=16 T 450 5800 9 8 1 1 0 0 1 pinlabel=ADCINB0 T 450 5800 5 8 0 1 0 2 1 pintype=in } P 100 5500 400 5500 1 0 0 { T 300 5550 5 8 1 1 0 6 1 pinnumber=29 T 300 5450 5 8 0 1 0 8 1 pinseq=17 T 450 5500 9 8 1 1 0 0 1 pinlabel=ADCINB1 T 450 5500 5 8 0 1 0 2 1 pintype=in } P 100 5200 400 5200 1 0 0 { T 300 5250 5 8 1 1 0 6 1 pinnumber=30 T 300 5150 5 8 0 1 0 8 1 pinseq=18 T 450 5200 9 8 1 1 0 0 1 pinlabel=ADCINB2 T 450 5200 5 8 0 1 0 2 1 pintype=in } P 100 4900 400 4900 1 0 0 { T 300 4950 5 8 1 1 0 6 1 pinnumber=31 T 300 4850 5 8 0 1 0 8 1 pinseq=19 T 450 4900 9 8 1 1 0 0 1 pinlabel=ADCINB3 T 450 4900 5 8 0 1 0 2 1 pintype=in } P 100 4600 400 4600 1 0 0 { T 300 4650 5 8 1 1 0 6 1 pinnumber=32 T 300 4550 5 8 0 1 0 8 1 pinseq=20 T 450 4600 9 8 1 1 0 0 1 pinlabel=ADCINB4 T 450 4600 5 8 0 1 0 2 1 pintype=in } P 100 4300 400 4300 1 0 0 { T 300 4350 5 8 1 1 0 6 1 pinnumber=33 T 300 4250 5 8 0 1 0 8 1 pinseq=21 T 450 4300 9 8 1 1 0 0 1 pinlabel=ADCINB5 T 450 4300 5 8 0 1 0 2 1 pintype=in } P 100 3700 400 3700 1 0 0 { T 300 3750 5 8 1 1 0 6 1 pinnumber=42 T 300 3650 5 8 0 1 0 8 1 pinseq=22 T 450 3700 9 8 1 1 0 0 1 pinlabel=FLT1 T 450 3700 5 8 0 1 0 2 1 pintype=pas } P 100 3400 400 3400 1 0 0 { T 300 3450 5 8 1 1 0 6 1 pinnumber=43 T 300 3350 5 8 0 1 0 8 1 pinseq=23 T 450 3400 9 8 1 1 0 0 1 pinlabel=FLT2 T 450 3400 5 8 0 1 0 2 1 pintype=pas } P 100 2800 400 2800 1 0 0 { T 300 2850 5 8 1 1 0 6 1 pinnumber=51 T 300 2750 5 8 0 1 0 8 1 pinseq=24 T 450 2800 9 8 1 1 0 0 1 pinlabel=GPOI41 T 450 2800 5 8 0 1 0 2 1 pintype=io } P 100 2500 400 2500 1 0 0 { T 300 2550 5 8 1 1 0 6 1 pinnumber=73 T 300 2450 5 8 0 1 0 8 1 pinseq=25 T 450 2500 9 8 1 1 0 0 1 pinlabel=GPIO42 T 450 2500 5 8 0 1 0 2 1 pintype=io } P 100 2200 400 2200 1 0 0 { T 300 2250 5 8 1 1 0 6 1 pinnumber=74 T 300 2150 5 8 0 1 0 8 1 pinseq=26 T 450 2200 9 8 1 1 0 0 1 pinlabel=GPIO43 T 450 2200 5 8 0 1 0 2 1 pintype=io } P 9100 11200 8800 11200 1 0 0 { T 8900 11250 5 8 1 1 0 0 1 pinnumber=100 T 8900 11150 5 8 0 1 0 2 1 pinseq=27 T 8750 11200 9 8 1 1 0 6 1 pinlabel=GPIO10/SCITXDB T 8750 11200 5 8 0 1 0 8 1 pintype=out } P 9100 10600 8800 10600 1 0 0 { T 8900 10650 5 8 1 1 0 0 1 pinnumber=1 T 8900 10550 5 8 0 1 0 2 1 pinseq=28 T 8750 10600 9 8 1 1 0 6 1 pinlabel=GPIO11/EPWM6B/SCIRXDB T 8750 10600 5 8 0 1 0 8 1 pintype=io } P 9100 10300 8800 10300 1 0 0 { T 8900 10350 5 8 1 1 0 0 1 pinnumber=3 T 8900 10250 5 8 0 1 0 2 1 pinseq=29 T 8750 10300 9 8 1 1 0 6 1 pinlabel=GPIO12/EPWM7A/CANTXB T 8750 10300 5 8 0 1 0 8 1 pintype=io } P 9100 10000 8800 10000 1 0 0 { T 8900 10050 5 8 1 1 0 0 1 pinnumber=4 T 8900 9950 5 8 0 1 0 2 1 pinseq=30 T 8750 10000 9 8 1 1 0 6 1 pinlabel=GPIO13/EPWM7B/CANRXB T 8750 10000 5 8 0 1 0 8 1 pintype=io } P 9100 9700 8800 9700 1 0 0 { T 8900 9750 5 8 1 1 0 0 1 pinnumber=5 T 8900 9650 5 8 0 1 0 2 1 pinseq=31 T 8750 9700 9 8 1 1 0 6 1 pinlabel=GPIO14/EPWM8A/SCITXDB T 8750 9700 5 8 0 1 0 8 1 pintype=io } P 9100 9400 8800 9400 1 0 0 { T 8900 9450 5 8 1 1 0 0 1 pinnumber=6 T 8900 9350 5 8 0 1 0 2 1 pinseq=32 T 8750 9400 9 8 1 1 0 6 1 pinlabel=GPIO15/EPWM8B/SCIRXDB T 8750 9400 5 8 0 1 0 8 1 pintype=io } P 9100 8800 8800 8800 1 0 0 { T 8900 8850 5 8 1 1 0 0 1 pinnumber=91 T 8900 8750 5 8 0 1 0 2 1 pinseq=33 T 8750 8800 9 8 1 1 0 6 1 pinlabel=GPIO2/EPWM2A T 8750 8800 5 8 0 1 0 8 1 pintype=out } P 9100 8500 8800 8500 1 0 0 { T 8900 8550 5 8 1 1 0 0 1 pinnumber=92 T 8900 8450 5 8 0 1 0 2 1 pinseq=34 T 8750 8500 9 8 1 1 0 6 1 pinlabel=GPIO3/EPWM2B T 8750 8500 5 8 0 1 0 8 1 pintype=out } P 9100 8200 8800 8200 1 0 0 { T 8900 8250 5 8 1 1 0 0 1 pinnumber=93 T 8900 8150 5 8 0 1 0 2 1 pinseq=35 T 8750 8200 9 8 1 1 0 6 1 pinlabel=GPIO4/EPWM3A T 8750 8200 5 8 0 1 0 8 1 pintype=out } P 9100 7600 8800 7600 1 0 0 { T 8900 7650 5 8 1 1 0 0 1 pinnumber=52 T 8900 7550 5 8 0 1 0 2 1 pinseq=36 T 8750 7600 9 8 1 1 0 6 1 pinlabel=GPIO58/MCLKRA T 8750 7600 5 8 0 1 0 8 1 pintype=io } P 9100 7300 8800 7300 1 0 0 { T 8900 7350 5 8 1 1 0 0 1 pinnumber=53 T 8900 7250 5 8 0 1 0 2 1 pinseq=37 T 8750 7300 9 8 1 1 0 6 1 pinlabel=GPIO59/MFSRA T 8750 7300 5 8 0 1 0 8 1 pintype=io } P 9100 7000 8800 7000 1 0 0 { T 8900 7050 5 8 1 1 0 0 1 pinnumber=54 T 8900 6950 5 8 0 1 0 2 1 pinseq=38 T 8750 7000 9 8 1 1 0 6 1 pinlabel=GPIO60/MCLKRB T 8750 7000 5 8 0 1 0 8 1 pintype=io } P 9100 6700 8800 6700 1 0 0 { T 8900 6750 5 8 1 1 0 0 1 pinnumber=56 T 8900 6650 5 8 0 1 0 2 1 pinseq=39 T 8750 6700 9 8 1 1 0 6 1 pinlabel=GPIO61/MFSRB T 8750 6700 5 8 0 1 0 8 1 pintype=io } P 9100 6400 8800 6400 1 0 0 { T 8900 6450 5 8 1 1 0 0 1 pinnumber=57 T 8900 6350 5 8 0 1 0 2 1 pinseq=40 T 8750 6400 9 8 1 1 0 6 1 pinlabel=GPIO62/SCIRXDC T 8750 6400 5 8 0 1 0 8 1 pintype=io } P 9100 6100 8800 6100 1 0 0 { T 8900 6150 5 8 1 1 0 0 1 pinnumber=58 T 8900 6050 5 8 0 1 0 2 1 pinseq=41 T 8750 6100 9 8 1 1 0 6 1 pinlabel=GPIO63/SCITXDC T 8750 6100 5 8 0 1 0 8 1 pintype=io } P 9100 5800 8800 5800 1 0 0 { T 8900 5850 5 8 1 1 0 0 1 pinnumber=59 T 8900 5750 5 8 0 1 0 2 1 pinseq=42 T 8750 5800 9 8 1 1 0 6 1 pinlabel=GPIO64 T 8750 5800 5 8 0 1 0 8 1 pintype=io } P 9100 5500 8800 5500 1 0 0 { T 8900 5550 5 8 1 1 0 0 1 pinnumber=60 T 8900 5450 5 8 0 1 0 2 1 pinseq=43 T 8750 5500 9 8 1 1 0 6 1 pinlabel=GPIO65 T 8750 5500 5 8 0 1 0 8 1 pintype=io } P 9100 5200 8800 5200 1 0 0 { T 8900 5250 5 8 1 1 0 0 1 pinnumber=61 T 8900 5150 5 8 0 1 0 2 1 pinseq=44 T 8750 5200 9 8 1 1 0 6 1 pinlabel=GPIO66 T 8750 5200 5 8 0 1 0 8 1 pintype=io } P 9100 4600 8800 4600 1 0 0 { T 8900 4650 5 8 1 1 0 0 1 pinnumber=75 T 8900 4550 5 8 0 1 0 2 1 pinseq=45 T 8750 4600 9 8 1 1 0 6 1 pinlabel=GPIO69 T 8750 4600 5 8 0 1 0 8 1 pintype=io } P 9100 4300 8800 4300 1 0 0 { T 8900 4350 5 8 1 1 0 0 1 pinnumber=76 T 8900 4250 5 8 0 1 0 2 1 pinseq=46 T 8750 4300 9 8 1 1 0 6 1 pinlabel=GPIO70/SCITXDB T 8750 4300 5 8 0 1 0 8 1 pintype=io } P 9100 4000 8800 4000 1 0 0 { T 8900 4050 5 8 1 1 0 0 1 pinnumber=77 T 8900 3950 5 8 0 1 0 2 1 pinseq=47 T 8750 4000 9 8 1 1 0 6 1 pinlabel=GPIO71/SCIRXDB T 8750 4000 5 8 0 1 0 8 1 pintype=io } P 9100 3700 8800 3700 1 0 0 { T 8900 3750 5 8 1 1 0 0 1 pinnumber=80 T 8900 3650 5 8 0 1 0 2 1 pinseq=48 T 8750 3700 9 8 1 1 0 6 1 pinlabel=GPIO72/SCITXDC T 8750 3700 5 8 0 1 0 8 1 pintype=io } P 9100 3400 8800 3400 1 0 0 { T 8900 3450 5 8 1 1 0 0 1 pinnumber=81 T 8900 3350 5 8 0 1 0 2 1 pinseq=49 T 8750 3400 9 8 1 1 0 6 1 pinlabel=GPIO73/SCIRXDC T 8750 3400 5 8 0 1 0 8 1 pintype=io } P 9100 3100 8800 3100 1 0 0 { T 8900 3150 5 8 1 1 0 0 1 pinnumber=82 T 8900 3050 5 8 0 1 0 2 1 pinseq=50 T 8750 3100 9 8 1 1 0 6 1 pinlabel=GPIO78 T 8750 3100 5 8 0 1 0 8 1 pintype=io } P 9100 2500 8800 2500 1 0 0 { T 8900 2550 5 8 1 1 0 0 1 pinnumber=85 T 8900 2450 5 8 0 1 0 2 1 pinseq=51 T 8750 2500 9 8 1 1 0 6 1 pinlabel=GPIO84/SCITXDA/MDXB T 8750 2500 5 8 0 1 0 8 1 pintype=io } P 9100 2200 8800 2200 1 0 0 { T 8900 2250 5 8 1 1 0 0 1 pinnumber=86 T 8900 2150 5 8 0 1 0 2 1 pinseq=52 T 8750 2200 9 8 1 1 0 6 1 pinlabel=GPIO85/SCIRXDA/MDRB T 8750 2200 5 8 0 1 0 8 1 pintype=io } P 9100 1900 8800 1900 1 0 0 { T 8900 1950 5 8 1 1 0 0 1 pinnumber=87 T 8900 1850 5 8 0 1 0 2 1 pinseq=53 T 8750 1900 9 8 1 1 0 6 1 pinlabel=GPIO86/SCITXDB/MCLKXB T 8750 1900 5 8 0 1 0 8 1 pintype=io } P 9100 1600 8800 1600 1 0 0 { T 8900 1650 5 8 1 1 0 0 1 pinnumber=88 T 8900 1550 5 8 0 1 0 2 1 pinseq=54 T 8750 1600 9 8 1 1 0 6 1 pinlabel=GPIO87/SCIRXDB/MFSXB T 8750 1600 5 8 0 1 0 8 1 pintype=io } P 9100 1300 8800 1300 1 0 0 { T 8900 1350 5 8 1 1 0 0 1 pinnumber=96 T 8900 1250 5 8 0 1 0 2 1 pinseq=55 T 8750 1300 9 8 1 1 0 6 1 pinlabel=GPIO89/SCITXDC T 8750 1300 5 8 0 1 0 8 1 pintype=out } P 9100 1000 8800 1000 1 0 0 { T 8900 1050 5 8 1 1 0 0 1 pinnumber=97 T 8900 950 5 8 0 1 0 2 1 pinseq=56 T 8750 1000 9 8 1 1 0 6 1 pinlabel=GPIO90/SCIRXDC T 8750 1000 5 8 0 1 0 8 1 pintype=io } P 9100 700 8800 700 1 0 0 { T 8900 750 5 8 1 1 0 0 1 pinnumber=98 T 8900 650 5 8 0 1 0 2 1 pinseq=57 T 8750 700 9 8 1 1 0 6 1 pinlabel=GPIO91/SDAA T 8750 700 5 8 0 1 0 8 1 pintype=io } P 9100 400 8800 400 1 0 0 { T 8900 450 5 8 1 1 0 0 1 pinnumber=99 T 8900 350 5 8 0 1 0 2 1 pinseq=58 T 8750 400 9 8 1 1 0 6 1 pinlabel=GPIO92/SCLA T 8750 400 5 8 0 1 0 8 1 pintype=io } B 400 100 8400 11400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 8800 11600 8 10 1 1 0 6 1 refdes=U? T 400 11600 9 10 1 0 0 0 1 TMS320F27075PZP T 400 12200 5 10 0 0 0 0 1 device=TMS320F27075PZP T 400 12000 5 10 0 0 0 0 1 footprint=TQFP-100-14-EP T 400 13200 5 10 0 0 0 0 1 author=AutoTron T 400 12400 5 10 0 0 0 0 1 documentation=http://www.ti.com/product/TMS320F27075/ T 400 12600 5 10 0 0 0 0 1 description=Piccolo Microcontroller T 3600 11600 5 10 0 0 0 0 1 numslots=0 T 400 13000 5 10 0 0 0 0 1 dist-license=GPL3 T 400 12800 5 10 0 0 0 0 1 use-license=unlimited T 2200 11600 9 10 0 0 0 0 1 symversion=0.3 T 400 11800 9 10 1 0 0 0 1 TQFP-100